This invention relates to a high-accuracy A/D converter, and particularly to a high-accuracy A/D converter suitable for converting an analog signal into a digital signal of 16 bits or more.
A conventional high-accuracy A/D converter of this type is described in JP-A-61-274515. In this A/D converter, an input analog signal is A-D converted with an A/D conversion circuit, the high-order 8 bits are stored in a memory, the stored 8-bit data is D-A converted with a D/A conversion circuit, the resulting analog value is subtracted from the input analog signal, the result of the subtraction is multiplied by 128 and then A-D converted with the above A/D conversion circuit, and the converted result is added to the stored digital value to obtain the final result of A/D conversion for the input analog signal. This conventional technique involves two D/A conversion circuits. The D/A conversion circuits receive digital values having a difference of 1, and the difference of the respective output analog values is multiplied by 128 and then A-D converted. The differences of two output analog values is evaluated for input digital values from 0 to 255 sequentially by incrementing the input digital value by 1 at a time. When the A-D converted value for each difference signal is added sequentially, the digital value produced at each step is stored in the memory. Consequently, D/A conversion for the high-order 8-bit A-D converted value for the input analog signal provides an accurate analog value, and it enables high-accuracy 19-bit A/D conversion.
However, in the foregoing conventional technique, when a digital value is D-A converted separately with two D/A conversion circuits, slightly different analog voltages are produced by the circuits, and this causes a conversion error of the high-accuracy A/D converter. Holding the output voltages of the two D/A conversion circuits accurately imposes difficulties on the design and on the D/A conversion efficiency. Another problem is that when the differential analog value resulting from two digital values which differ by 1 from each other is smaller than the analog voltage for the lowest bit, the voltage component short of the lowest-bit voltage becomes an error. When the differential analog value is greater than the lowest-bit analog voltage, the amplifier which multiplies the differential voltage by 128-fold can be saturated at its maximum range.